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SI53327 - Low-Jitter LVPECL Fanout Clock Buffers

Download the SI53327 datasheet PDF. This datasheet also covers the SI53320 variant, as both devices belong to the same low-jitter lvpecl fanout clock buffers family and are provided as variant models within a single manufacturer datasheet.

General Description

2.

The Si53320-28 are a family of low-jitter, low-skew, fixed-format (LVPECL) buffers.

All devices except the Si53326 and Si53328 have a universal input that accepts most common differential or LVCMOS input signals.

Key Features

  • include independent output enable and built-in format translation. These buffers can be paired with the Si534x clocks and Si5xx oscillators to deliver end-to-end clock tree performance. KEY.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (SI53320-SiliconLaboratories.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
Si53327 Low-Jitter LVPECL Fanout Clock Buffers Skyworks Solutions
Si5332 Any-Frequency Clock Generator Skyworks
Si53320 Low-Jitter LVPECL Fanout Clock Buffers Skyworks Solutions
Si53321 Low-Jitter LVPECL Fanout Clock Buffers Skyworks Solutions
Si53322 Low-Jitter LVPECL Fanout Clock Buffers Skyworks Solutions

Other Datasheets by Silicon Laboratories

Part Number Description
Si5332 6/8/12-Output Any-Frequency Clock Generator
SI53320 Low-Jitter LVPECL Fanout Clock Buffers
SI53321 Low-Jitter LVPECL Fanout Clock Buffers
SI53322 Low-Jitter LVPECL Fanout Clock Buffers
SI53323 Low-Jitter LVPECL Fanout Clock Buffers

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
Si53320-28 Data Sheet Low-Jitter LVPECL Fanout Clock Buffers with up to 10 LVPECL Outputs from Any-Format Input and Wide Frequency Range from DC up to 1250 MHz The Si53320–28 family of LVPECL fanout buffers is ideal for clock/data distribution and redundant clocking applications. These devices feature typical ultra-low jitter characteristics of 50 fs and operate over a wide frequency range from dc to 725/1250 MHz. Builtin LDOs deliver high PSRR performance and reduce the need for external components, simplifying low-jitter clock distribution in noisy environments. The Si53320–28 family is available in multiple configurations, with some versions offering a selectable input clock using a 2:1 input mux. Other features include independent output enable and built-in format translation.